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CDB4811
Evaluation Board for CS4811
Features
l Evaluation
Description
The CDB4811 is a stand-alone demonstration platform for the CS4811 multi-effects processor system-on-achip. The board is designed to showcase musical effects processing applications including spring reverb, digital reverb, delay, chorus, flange, and tremolo effects. There are different versions of the CDB4811 board, each with DSP code optimized for specific applications. Contact your local Cirrus Logic sales representative to find out about the latest versions offered. ORDERING INFORMATION CDB4811GTR Guitar Effects Evaluation Kit CDB4811MXR Mixer Effects Evaluation Kit
Platform for the CS4811 Fixed Function Multi-Effects Processor l Stand-Alone Operation, DSP Boots from Serial EEPROM l Selection of Up to 8 Different Presets l On-Board Hardware Wet/Dry Mix Control l User Adjustable Input and Output Level
+5V
Mute Control
Rotary Preset Selection Switches Input Level Control
GPIO
8.192 MHz Timing Crystal
SPI Serial EEPROM
Serial EEPROM
Output Level Control
Clock Generator DSP Core Prog & Data RAM
Serial Port 24-bit DAC
Analog Audio Output
Analog Audio Input
24-bit ADC
CS4811
Hardware Wet/Dry Mix Control
Preliminary Product Information
P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com
This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice.
Copyright (c) Cirrus Logic, Inc. 2000 (All Rights Reserved)
SEP `00 DS486DB2 1
CDB4811
TABLE OF CONTENTS
1. 2. 3. 4. 5. 6. 7. CDB4811 SYSTEM OVERVIEW ........................................................................................ 3 CS4811 AUDIO PROCESSOR .......................................................................................... 3 ANALOG INPUT ................................................................................................................ 3 ANALOG OUTPUT ............................................................................................................ 3 CONTROL .......................................................................................................................... 3 POWER SUPPLY ............................................................................................................... 4 LAYOUT ............................................................................................................................. 4
LIST OF FIGURES
Figure 1. Schematic Diagram ................................................................................................... 5 Figure 2. Bill of Materials .......................................................................................................... 6 Figure 3. Silkscreen and Pads.................................................................................................. 7 Figure 4. Top Layer .................................................................................................................. 8 Figure 5. Bottom Layer ............................................................................................................. 9
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at: http://www.cirrus.com/corporate/contacts/
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com.
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CDB4811
1. CDB4811 SYSTEM OVERVIEW
The CDB4811 is a complete, stand-alone digital signal processing (DSP) system based on the CS4811 fixed function multi-effects audio processor. The CS4811 contains an on-chip analog-todigital converter (ADC), digital to-analog-converter (DAC), and proprietary 24-bit audio processing core with a large amount of on-chip RAM. The CS4811's functionality (changing effects) is controlled during runtime by a rotary DIP switch, allowing up to 8 different presets to be selected. A hardware mix control allows the ratio of processed vs. input signal to be adjusted. The user can also set the level of the analog input and output to optimize the interface with external audio equipment.
4. ANALOG OUTPUT
The processed output signal is mixed with the amplified input signal with potentiometer VR3 (MIX). Turning MIX clockwise increases the amount of the processed (wet) signal that appears at the output. The mixed output is then buffered with an output stage that has a variable gain of -60 to +6 dB adjusted via 12-turn potentiometer VR2 (GAIN TRIM). Turning GAIN TRIM clockwise increases the output gain. The best signal-to-noise ratio is obtained when the full scale output of the CDB4811 matches the full scale (non-clipped) amplitude capabilities of the downstream circuitry (ideally 5 V p-p or 1.77 V RMS). The signal-to-noise ratio will decrease when the gain of the output buffer is greater than one. The differential analog output from the CS4811 DAC is buffered with a 2-pole active butterworth filter U2A, Fc = 16 kHz, Av = 0.83 V/V. The purpose of the filter is to convert the output to single ended prior to mixing, attenuate out-of-band noise generated by the DAC, and limit the signal swing to 5 V p-p. Q3 acts as a shunt to attenuate any loud pops that may occur during power up/down. Q3 is controlled by a digital output pin on the CS4811 that is asserted at power-up and de-asserted after the DSP has booted.
2. CS4811 AUDIO PROCESSOR
The processor is capable of self-loading its program from an external serial EEPROM memory at power-up through the control port. In this application the control port uses SPI format. Since the CS4811 is RAM based, it can be configured for different signal processing applications by storing a different Crystal supplied application code module into the external memory.
3. ANALOG INPUT
The analog input to the on-chip ADC (J1) is single ended, with an adjustable voltage gain of -60 to +34 dB. Adjusting the 12-turn INPUT ATTEN potentiometer clockwise will increase the input gain. For best signal-to-noise performance the input gain should be increased until just before audible clipping is encountered with a maximum level input signal. Substantial input clipping is indicated when LED D3 is lit (CLIP). The full scale input of the ADC (driven single ended) is 1.77V RMS (5 V pp). The ADC input signal is anti-aliased with a passive filter, Fc = 480 kHz, as shown in the schematic diagram of Figure 1. The ADC input is protected against overvoltage by diodes D1 and D2.
5. CONTROL
Rotary DIP switch S1 is used to control various aspects of the CS4811 code functionality such as selecting different musical effects presets. Moving a switch to the ON position sets that bit position to zero (low). Header JP2, FOOTSWITCH, is provided to connect an external switch to the system. The header is connected in parallel with S1 switch 3. A 10 k pull-up is attached to the round pad of the FOOTSWITCH header, the other pad is connected to ground. To use the FOOTSWITCH input, connect an external SPST switch between the two ter-
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CDB4811
minals of JP2, and place S1 switch 3 to the OFF position. Please see the CS4811 firmware code application documents for details of any specific functions which may be assigned to the S1 DIP switch. If S1 functionality is not discussed in the application document then it is not supported.
7. LAYOUT
The reference filter capacitor C9 must be kept as close as practical to the device, the CMFILT+ signal trace (pin 93) and CMFILT- ground return trace (pin 94) should be on the top side of the board and as short as possible. Keep other traces away from this node, as any noise coupled into the CMFILT+ pin will appear at the DAC outputs with little or no attenuation. If the board environment is noisy, a 0.1 uf capacitor should be added in parallel with C9 to help eliminate noise coupling. Mount the 0.047 uf surface mount power supply decoupling capacitors as close to the device as possible. Again, keep the traces to these capacitors and the device supply pins and ground pins on the top side of the board and as short as practical. The anti-aliasing filter capacitor C2 should be mounted as close to the device as practical. The AC shorting capacitor C4 should also be close to the device. All digital traces should be kept away from the analog input and output sections of the board. A ground fill is used on both top and bottom layers to minimize noise coupling and ground trace impedance. Separate analog and digital grounds are not needed and should not be used. The PCB layout for the board appears in Figures 3, 4, and 5.
6. POWER SUPPLY
Power is attached to the board through a 2.5 mm power connector J3, positive is the center contact. An unregulated 9 VDC, 0.5 A wall transformer is supplied with the board. An on-board voltage regulator supplies 200 mA@5 V to the system from an 8 to 12 VDC input. An external power resistor can be used to limit the input voltage to the board in applications where a 12 V supply is not available. In applications where 5 V is available, the regulator can be removed and a shorting jumper installed at R27. If this modification is done, care must then be taken not to plug the 9 VDC transformer into the board or the CS4811 may be damaged.
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2
1
AIN
1 CW C3 39pf
2
25LC640CSN GND
HEADER 5X2
Program
VCC VCC R4 3.3k
GND C2 1nf 1 R5 3.3k U3 GND
2
7 5 U2B OPA2340UA +
+
GND CMOU T C6 1nf AIN 3
CW
VCC C28 VCC U4 2 3 GND VDD OUT VSS MN13821 T PIO0 PIO1 PIO2 PIO3 GND 1 MRESETn CLIP R12 R8 3.3k 47nf
CDOUT CCLK CDIN nCS VCC R26 3.3k SCPM/nS
62 63 67 68 71 82 83 69 70 72 73 39 41 40 37 35 61 60 59 58 57 48 38 36 34 32 43 65
SDA/CDOUT SCLK/CCLK AD1/CDIN AD0/nCS nREQ DBCLK DBDA I2C/nSPI SCPM/nS nRST VD3 OVL PIO0 PIO1 PIO2 PIO3 NC61 NC60 NC59 NC58 NC57 NC56 NC55 NC54 NC38 NC37 VD1 VD2 DGND1 DGND2 DGND3 DGND4 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 CS4811
86 AINL+ 87 AINL90 NC50 91 NC49 CMOUT AOUT1+ AOUT1NC48 NC47 NC46 NC45 NC44 NC43 NC42 NC41 NC40 NC39 NC53 NC52 NC51 CMFILT+ CMFILTXTI XTO CLKOUT VA1 VA2 VA3 AGND1 AGND2 AGND3 AGND4 NC36 NC35 NC34 NC33 NC32 NC31 NC30 NC29 NC28 NC27 NC26 NC25 NC24 NC23 NC22 NC21 NC20 NC19 92 7 8 9 10 14 15 16 17 20 21 22 23 95 97 96 93 94 45 46 47 12 18 88 11 13 19 89 100 99 98 85 84 81 80 79 78 77 76 75 74 56 55 54 53 52
2
GND GND
3
CW R9 10k R14 12k 1uf/50 GND C10 39pf 2 3 VR3 POT20k/ 1T MIX 1 2 10k R10 6 5 R11 7 + U5B OPA2340UA 1k C8 + J2 PHONO JACK RA 1 R13 100k 2 GND 1 U5A OPA2340UA C11 R21 10k 47nf VA C12 39pf GND C14 47nf C15 47nf C16 47nf + C17 10uf/25 GND R23 10k 1 VA + R19 1 3.3k GND 2 Q2 MMBT 3904 3 Q1 MMBT 3906 2 3 MUT E GND VA C24 47nf
3.3k
C9 +
2
4
JP2 2 1 HEADER 2
R15 10k
R16 10k
R17 10k
R18 10k
Y1 8.192 MHz
GND R22 12k
Footswitch
VCC +
GND
GND
VA
C13 1nf
R24 10k R25 PIO3 10k + C21 10uf/25 GND 3 1 2
C18 10uf/25
C19 47nf
C20 47nf
C27 47nf
42 44 64 66 1 2 3 4 5 6 24 25 26 27 28 29 30 31 33 49 50 51
8
CLIP 1
4
2 3 CMOU T R27
1 U2A OPA2340UA 8 +
D3 RED LED 2
C26 J3 47nf GND VA 1 3 2 + PWRJACK C25 47nf 1 U6 NJM78M05FA VIN GND VOUT 3 Bead C23 47nf T0220 60 deg/W VCC L1
GND
GND
GND
GND S1 PIO1 4 5 6 2 C1 8 4 C2 1 3 2 1 PIO2 PIO0
SWITCH, ROTARY DIP GND GND
2
Figure 1. Schematic Diagram 5
-
-
-
DS486DB2
R1 270k VA VCC U1 C1 47nf 8 7 3 4 VCC nHOLD nWP VSS SI SO SCK nCS 5 2 6 1 CDOUT CDIN CCLK nCS JP1 1 3 5 7 9 2 4 6 8 10 VR1 POT500k/ 10T INPUT ATTEN R2 330 SCPM/nS D1 1N4148 3 D2 1N4148 R3 R6 10k 6 1uf/50 C5 1 R7 100k J1 PHONO JACK RA 47k VR2 POT20k/1 0T GAIN TRIM 1 + C4 10uf/25 C7 1nf 10uf/25 GND Q3 MMBT 3906 GND 0 C22 10uf/25
CDB4811
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CS4811 REVERB DEMO Revised: Tuesday, May 10, 2000 CDB4811 Revision: B Cirrus Logic 4210 S. Industrial Dr. Austin, TX 78744 Bill Of Materials Item 1 May 10,2000 11:27:21 Value 47nf Mf g PANASONIC Mfg Part Number ECU-V1H473KBW Description CAP, CERAMIC, 47NF, 50V, 10%, X7R, 1206 Footprint CSN_1206 Notes NO POP C27 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 100 101 102 103 Quantity Reference 13 C1,C11,C14,C15,C16,C19, C20,C23,C24,C25,C26,C27, C28 4 C2,C6,C7,C13 3 C3,C10,C12 6 C4,C8,C17,C18,C21,C22 2 C9,C5 2 D1,D2 1 D3 1 JP1 1 JP2 2 J1,J2 1 J3 1 L1 2 Q3,Q1 1 Q2 1 R1 1 R2 1 R3 6 R4,R5,R8,R12,R19,R26 11 R6,R9,R10,R15,R16,R17, R18,R21,R23,R24,R25 2 R13,R7 1 R11 2 R14,R22 1 R27 1 S1 1 U1 2 U5,U2 1 U3 1 U4 1 U6 1 VR1 1 VR2 1 VR3 1 Y1 1 4 4 1 1nf 39pf 10uf/25 1uf/50 1N4148 RED LED HEADER 5X2 HEADER 2 PHONO JACK RA PWRJACK Bead MMBT3906 MMBT3904 270k 330 47k 3.3k 10k PANASONIC ECU-V1H102JCH PANASONIC ECU-V1H390JCM PANASONIC ECE-V1EA100SR PANASONIC ECE-V1HA010SR VISHAY LL4148DIC CHICAGO MIN ACMD28-21SRC/TR8/T1 NA NA NA NA A/D ELECT ARJ2018 CUI STACK PJ202A PANASONIC EXC-ML45A910U MOTOROLA MMBT3906LT1 MOTOROLA MMBT3904LT1 PANASONIC ERJ-8GEYJ274 PANASONIC ERJ-8GEYJ331 PANASONIC ERJ-8GEYJ473 PANASONIC ERJ-8GEYJ332 PANASONIC ERJ-8GEYJ103 ERJ-8GEYJ104 ERJ-8GEYJ102 ERJ-8GEYJ123 ERJ-8GEYJ000 94HA08W 25LC640CSN OPA2340UA CS4811CM MN13821T NJ78M05FA 3266W-504 3266W-203 3352H-203 XT49S-20 8.192M CAP, CERAMIC, 1NF, 100V, 5%, NPO, 1206 CAP, CERAMIC, 39PF, 100V, 5%, NPO, 1206 CAP, ELECT, 10UF, 25V, 10%, AL, SM CAP, ELECT, 1UF, 50V, 10%, AL, SM DIODE, HS SWITCHING, MELF, SOD-80 DIODE, LED, RED, 1MA, SM HEADER, MALE, 5X2SM HEADER, 2 PIN, 0.1 IN CENTER PHONO JACK, RA, GOLD JACK, POWER, PWB, SM FERRITE BEAD, 1812 BJT, PNP, GENERAL PURPOSE, SOT23 BJT, NPN, GENERAL PURPOSE, RES, THICK FILM, 270K, 1/8W, 5%, 1206 RES, THICK FILM, 330, 1/8W, 5%, 1206 RES, THICK FILM, 47K, 1/8W, 5%, 1206 RES, THICK FILM, 3.3K, 1/8W, 5%, 1206 RES, THICK FILM, 10K, 1/8W, 5%, 1206 CSN_1206 CSN_1206 CSP_ELEC_208SQ CSP_ELEC_170SQ SOD-80 LED_CMD28-21 HDR5X2SM NO POP HDR2X1 NO POP CON_RCA_RA CON_PJ-202A IND_1812 SOT23 SOT23 RES_1206 NO POP RES_1206 RES_1206 RES_1206 RES_1206 100k PANASONIC 1k PANASONIC 12k PANASONIC 0 PANASONIC SWITCH, ROTARY D GRAYHILL 25LC640CSN MICROCHIP OPA2340UA BURRBROWN CS4811 CRYSTAL MN13821T PANASONIC NJM78M05FA NJR POT500k/10T BOURNS POT20k/10T BOURNS POT20k/1T BOURNS 8.192 MHz VISHAY RES, THICK FILM, 100K, 1/8W, 5%, 1206 RES_1206 RES, THICK FILM, 1K, 1/8W, 5%, 1206 RES_1206 RES, THICK FILM, 12K, 1/8W, 5%, 1206 RES_1206 RES, THICK FILM, 0, 1/8W, 5%, 1206 RES_1206 NO POP SWITCH, DIP, ROTARY, OCTAL, SM SW-DIPROT4_SM IC, EEPROM, SERIAL, SPI, 64KBIT, SO8 SO8-150 IC, OPAMP, DUAL, SO8 SO8-150 DSP/CODEC, MONO, 100MQFP QFP100_14X20 IC, VOLTAGE DETECTOR, OD, 4.4-4.7V, SC59A SC59A IC, VOLTAGE REGULATOR, TO220 TO-220AB POTENTIOMETER, 500K, LIN, 10TURN, TOPADJ, TH POT-BRNS-3266W POTENTIOMETER, 20K, LIN, 10TURN, TOPADJ, TH POT-BRNS-3266W POTENTIOMETER, 20K, LIN, 1TURN, TOPADJ, TH POT-BRNS-3352H CRYSTAL, PARALLEL CUT, 8.192MHZ, 20PF, HC49S XTL_HC49S Wall Transformer, 9VDC, 500mA, unregulated, 2.1mm fem Hex threaded standoff, Nylon, 4-40 x 0.375" machine screw, pan head, Nylon, 4-40 x 0.375" knob, gray with black arrow S1 CUI STACK DPD090050-P-5 Keystone 4801K-ND e H544-ND Building Fasten Grayhill 947706-005
CDB4811
INSTALL ON S1
DS486DB2
Figure 2. Bill of Materials
CDB4811
Figure 3. Silkscreen and Pads
DS486DB2
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CDB4811
Figure 4. Top Layer
8
DS486DB2
CDB4811
Figure 5. Bottom Layer
DS486DB2
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